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HAT2024R
Silicon N Channel Power MOS FET High Speed Power Switching
REJ03G1159-0500 (Previous: ADE-208-494C) Rev.5.00 Sep 07, 2005
Features
* * * * Low on-resistance Capable of 4 V gate drive Low drive current High density mounting
Outline
RENESAS Package code: PRSP0008DD-D (Package name: SOP-8 )
78 DD 56 DD
65 87 12 34
2 G
4 G
1, 3 2, 4 5, 6, 7, 8
Source Gate Drain
S1 MOS1
S3 MOS2
Rev.5.00 Sep 07, 2005 page 1 of 7
HAT2024R
Absolute Maximum Ratings
(Ta = 25C)
Item Drain to source voltage Gate to source voltage Drain current Drain peak current Body-drain diode reverse drain current Channel dissipation Channel dissipation Channel temperature Storage temperature Symbol VDSS VGSS ID ID (pulse) IDR
Note 1
Value 30 20 5.5 44 5.5 2 3 150 -55 to +150
Unit V V A A A W W C C
Pch Note 3 Pch Tch Tstg
Note 2
Notes: 1. PW 10 s, duty cycle 1% 2. 1 Drive operation: When using the glass epoxy board (FR4 40 x 40 x 1.6 mm), PW 10 s 3. 2 Drive operation: When using the glass epoxy board (FR4 40 x 40 x 1.6 mm), PW 10 s
Electrical Characteristics
(Ta = 25C)
Item Drain to source breakdown voltage Gate to source breakdown voltage Gate to source leak current Zero gate voltage drain current Gate to source cutoff voltage Static drain to source on state resistance Forward transfer admittance Input capacitance Output capacitance Reverse transfer capacitance Turn-on delay time Rise time Turn-off delay time Fall time Body-drain diode forward voltage Body-drain diode reverse recovery time Note: 4. Pulse test Symbol V (BR) DSS V (BR) GSS IGSS IDSS VGS (off) RDS (on) RDS (on) |yfs| Ciss Coss Crss td (on) tr td (off) tf VDF trr Min 30 20 -- -- 1.0 -- -- 3.5 -- -- -- -- -- -- -- -- -- Typ -- -- -- -- -- 0.05 0.078 5.5 310 220 100 17 190 25 60 0.9 50 Max -- -- 10 10 2.0 0.065 0.11 -- -- -- -- -- -- -- -- 1.4 -- Unit V V A A V S pF pF pF ns ns ns ns V ns IF = 5.5 A, VGS = 0 IF = 5.5 A, VGS = 0 diF/dt = 20 A/s
Note 4
Test Conditions ID = 10 mA, VGS = 0 IG = 100 A, VDS = 0 VGS = 16 V, VDS = 0 VDS = 30 V, VGS = 0 VDS = 10 V, ID = 1 mA ID = 3 A, VGS = 10 V Note 4 ID = 3 A, VGS = 4 V ID = 3 A, VDS = 10 V VDS = 10 V VGS = 0 f = 1 MHz VGS = 4 V, ID = 3 A, VDD 10 V
Note 4
Note 4
Rev.5.00 Sep 07, 2005 page 2 of 7
HAT2024R
Main Characteristics
Power vs. Temperature Derating
4.0 100 Test Condition: When using the glass epoxy board (FR4 40 x 40 x 1.6 mm), PW 10 s 30
10
Maximum Safe Operation Area
10 s
Pch (W)
ID (A)
3.0
10
DC
0
PW
Channel Dissipation
3 1 0.3 0.1
Op
=
1m
10
s
s
Drain Current
er
2.0
1 Dr ive
at
ion
ms
No te 5
2 Dr
1.0
Op
Operation in this area is limited by RDS (on)
(P
ive
W
1
er
Op
0
at
ion at er
s)
ion
0
0
50
100
150
200
Ta = 25C 0.03 1 shot Pulse 1 Drive Operation 0.01 0.1 0.3 1 3
10
30
100
Ambient Temperature
Ta (C)
Drain to Source Voltage
VDS (V)
Note 5: When using the glass epoxy board (FR4 40 x 40 x 1.6 mm)
Typical Output Characteristics
20 10 V 8 V 6 V 5V Pulse Test 20
Typical Transfer Characteristics
25C
(A)
(A)
Tc = 75C 16 -25C
16
4.5 V 4V 3.5 V 3V VGS = 2.5 V
ID
12
ID
12 8
Drain Current
Drain Current
8
4
4 VDS = 10 V Pulse Test 0
0 0 2 4 6 8 10
0
2
4
6
8
10
Drain to Source Voltage
VDS (V)
Gate to Source Voltage
VGS (V)
Drain to Source Saturation Voltage vs. Gate to Source Voltage
VDS (on) (V)
Pulse Test 0.4
Static Drain to Source on State Resistance vs. Drain Current
Drain to Source on State Resistance RDS (on) ()
1 Pulse Test 0.5
0.5
Drain to Source Voltage
0.3
0.2 0.1 0.05 10 V 0.02 0.01 0.2 VGS = 4 V
ID = 5 A
0.2 2A 0.1 1A
0 0 2 4 6 8 10
0.5
1
2
5
10
20
Gate to Source Voltage
VGS (V)
Drain Current
ID (A)
Rev.5.00 Sep 07, 2005 page 3 of 7
HAT2024R
Static Drain to Source on State Resistance vs. Temperature
0.20 Pulse Test 0.16 2A 0.12 VGS = 4 V 0.08 1 A, 2 A, 5 A 10 V 0 -40 0 40 80 120 160 ID = 5 A 1A
Static Drain to Source on State Resistance RDS (on) ()
Forward Transfer Admittance vs. Drain Current
Forward Transfer Admittance |yfs| (S)
20 10 5 2 1 0.5 0.2 0.1 0.2 0.5 1 2 VDS = 10 V Pulse Test 5 10 20 25C Tc = -25C
75C
0.04
Case Temperature
Tc
(C)
Drain Current ID (A) Typical Capacitance vs. Drain to Source Voltage
1000 500
Body-Drain Diode Reverse Recovery Time
Reverse Recovery Time trr (ns)
500
Capacitance C (pF)
200 100 50
Ciss 200 100 50 20 10 Crss Coss
20 10 5 0.1 di / dt = 20 A / s VGS = 0, Ta = 25C 0.2 0.5 1 2 5 10
VGS = 0 f = 1 MHz 0 10 20 30 40 50
Reverse Drain Current IDR (A)
Drain to Source Voltage VDS (V) Reverse Drain Current vs. Source to Drain Voltage
VGS (V)
20 20
Dynamic Input Characteristics
VDS (V)
50
40 VDD = 5 V 10 V 20 V VGS VDD = 20 V 10 V 5V 0 2 4 6 8
16
Reverse Drain Current IDR (A)
ID = 5.5 A
16 VGS = 5 V 12 0, -5 V
Drain to Source Voltage
30 VDS 20
12
8
Gate to Source Voltage
8
10
4
4 Pulse Test 0 0 0.4 0.8 1.2 1.6 2.0
0
0 10
Gate Charge
Qg (nc)
Source to Drain Voltage
VSD (V)
Rev.5.00 Sep 07, 2005 page 4 of 7
HAT2024R
Switching Characteristics
500 VGS = 4 V, VDD = 10 V PW = 3 s, duty 1 %
Switching Time t (ns)
200 100 50 tr tf td(off) 20 10 5 0.1 td(on)
0.2
0.5
1
2
5
10
Drain Current
Normalized Transient Thermal Impedance s (t)
10
ID
(A)
Normalized Transient Thermal Impedance vs. Pulse Width (1 Drive Operation)
1
D=1 0.5
0.1
0.2
0.1
0.05
0.01
0.02 0.01
p ot uls e
ch - f (t) = s (t) * ch - f ch - f = 125C/W, Ta = 25C When using the glass epoxy board (FR4 40 x 40 x 1.6 mm) PDM PW T D= PW T
0.001
1s
h
0.0001 10
100
1m
10 m
100 m
1
10
100
1000
10000
Pulse Width PW (S) Normalized Transient Thermal Impedance vs. Pulse Width (2 Drive Operation)
Normalized Transient Thermal Impedance s (t)
10
1
D=1 0.5
0.1
0.2
0.1
0.05
0.01
0.02 0.01
e uls
ch - f (t) = s (t) * ch - f ch - f = 166C/W, Ta = 25C When using the glass epoxy board (FR4 40 x 40 x 1.6 mm) PDM PW T 1m 10 m 100 m 1 10 100 1000 10000 D= PW T
0.001
1s
ho
tp
0.0001 10
100
Pulse Width PW (S)
Rev.5.00 Sep 07, 2005 page 5 of 7
HAT2024R
Switching Time Test Circuit Switching Time Waveform
Vin Monitor D.U.T. RL
Vout Monitor Vin Vout 10% 10%
90%
10%
Vin 4V
50
VDD = 10 V td(on)
90% tr
90% td(off) tf
Rev.5.00 Sep 07, 2005 page 6 of 7
HAT2024R
Package Dimensions
JEITA Package Code P-SOP8-3.95 x 4.9-1.27 RENESAS Code PRSP0008DD-D Package Name FP-8DAV MASS[Typ.] 0.085g
*1 D
F
8
5
*2 E HE
bp
Index mark
1
Z e
4
*3 bp xM
c
Terminal cross section (Ni/Pd/Au plating)
NOTE) 1. DIMENSIONS "*1(Nom)" AND "*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET.
Reference Symbol
Dimension in Millimeters Min Nom 4.90 3.95 Max 5.3
L1
D E A2 A1 A 0.10
0.14
0.25 1.75
A
bp b1
0.34
0.40
0.46
A1
c
0.15
0.20
0.25
L
c1 0 HE 5.80 6.10 1.27 0.25 0.1 0.75 0.40 0.60 1.08 1.27 8 6.20
y
Detail F
e x y Z L L1
Ordering Information
Part Name Quantity Shipping Container HAT2024R-EL-E 2500 pcs Taping Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of production before ordering the product.
Rev.5.00 Sep 07, 2005 page 7 of 7
Sales Strategic Planning Div.
Keep safety first in your circuit designs!
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein.
RENESAS SALES OFFICES
Refer to "http://www.renesas.com/en/network" for the latest and detailed information. Renesas Technology America, Inc. 450 Holger Way, San Jose, CA 95134-1368, U.S.A Tel: <1> (408) 382-7500, Fax: <1> (408) 382-7501 Renesas Technology Europe Limited Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, U.K. Tel: <44> (1628) 585-100, Fax: <44> (1628) 585-900 Renesas Technology Hong Kong Ltd. 7th Floor, North Tower, World Finance Centre, Harbour City, 1 Canton Road, Tsimshatsui, Kowloon, Hong Kong Tel: <852> 2265-6688, Fax: <852> 2730-6071 Renesas Technology Taiwan Co., Ltd. 10th Floor, No.99, Fushing North Road, Taipei, Taiwan Tel: <886> (2) 2715-2888, Fax: <886> (2) 2713-2999 Renesas Technology (Shanghai) Co., Ltd. Unit2607 Ruijing Building, No.205 Maoming Road (S), Shanghai 200020, China Tel: <86> (21) 6472-1001, Fax: <86> (21) 6415-2952 Renesas Technology Singapore Pte. Ltd. 1 Harbour Front Avenue, #06-10, Keppel Bay Tower, Singapore 098632 Tel: <65> 6213-0200, Fax: <65> 6278-8001 Renesas Technology Korea Co., Ltd. Kukje Center Bldg. 18th Fl., 191, 2-ka, Hangang-ro, Yongsan-ku, Seoul 140-702, Korea Tel: <82> 2-796-3115, Fax: <82> 2-796-2145
http://www.renesas.com
Renesas Technology Malaysia Sdn. Bhd. Unit 906, Block B, Menara Amcorp, Amcorp Trade Centre, No.18, Jalan Persiaran Barat, 46050 Petaling Jaya, Selangor Darul Ehsan, Malaysia Tel: <603> 7955-9390, Fax: <603> 7955-9510
(c) 2005. Renesas Technology Corp., All rights reserved. Printed in Japan.
Colophon .3.0

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